MT53D512M16D1DS-046 WT:DMicron

DRAM LPDDR4 8Gbit 16 200/264 WFBGA 1 IT SDRAM - Mobile LPDDR4 Memory IC 8Gbit 2.133 GHz 200-WFBGA (10x14.5) MT53D512M16D1DS-046 IT:D is a mobile LPDDR4 SDRAM. The mobile low-power DDR4 SDRAM with low VDDQ (LPDDR4X) is a high-speed CMOS, dynamic random-access memory. The device is internally configured with x16 I/O, 8-banks. Each of the x16’s 1,073,741,824bit banks are organized as 65,536 rows by 1024 columns by 16 bits. LPDDR4 uses a double-data-rate (DDR) protocol on the DQ bus to achieve high-speed operation. The DDR interface transfers two data bits to each DQ lane in one clock cycle and is matched to a 16n-prefetch DRAM architecture. 16n prefetch DDR architecture, 8 internal banks per channel for concurrent operation Single-data-rate CMD/ADR entry, bidirectional/differential data strobe per byte lane Programmable READ and WRITE latencies (RL/WL), programmable and on-the-fly burst lengths (BL=16, 32) Directed per-bank refresh for concurrent bank operation and ease of command scheduling On-chip temperature sensor to control self refresh rate Partial-array self refresh (PASR), selectable output drive strength (DS), clock-stop capability 2133MHz clock rate, 4266Mb/s/pin data rate 1.10V VDD2 / 0.60V VDDQ or 1.10V VDDQ operating voltage 512 Meg x 16 configuration 200-ball WFBGA package, -40°C to +95°C operating temperature